Formation of patterns having depth and height in solid state materials remains a significant challenge where nanoscale pattern features are required. Mechanical techniques, e.g., machining, are generally unsuitable. Mask transfer techniques, electron beam lithography, and other techniques practiced to make small features are successfully conducted, but pose problems, especially when scaled-up in a manufacturing environment.
The fast growing optical devices field has an ever-growing need for nanoscale pattern features. Exposed surface relief geometries are an example. Exposed surface relief geometries are used, for example, for optical phase modulation in diffractive optical devices, as periodic nanostructures for artificial dielectrics, and as period nanostructures for photonic crystal-based devices. Semiconductor lasers also use exposed surface relief geometries, for example, as distributed Bragg reflectors, and as ridge structures for optical waveguides. In other cases, surface relief geometries are buried, i.e., they are not part of the uppermost surface of a device. These distinctions are discussed so that surface relief is understood to refer to the surface of a layer being patterned, and not necessarily the surface of an uppermost device layer.
The most commonly used procedure for fabrication of surface relief profiles pattern features is a resist and dry etching process. A resist pattern is prepared. The pattern is then transferred into a dry-etch-resistant mask layer. Dry etching transfers the pattern structure from the mask layer into the solid state material. This process becomes more difficult as feature sizes are reduced.
High resolution electron-beam lithography is widely used to realize small features by writing the pattern in E-beam resist. Tracing patterns with a controlled electron beam is, however, time consuming and costly. To obtain a hardened mask for the dry etching process, the patterns defined by an e-beam are usually transferred into a CVD (chemical vapor deposition) grown SiO2 layer, and possibly additional steps to make the mask more durable. This is followed by application of the mask to the layer to be patterned, etching and liftoff. These mask transfers increase the mask durability, but the mask patterns may degrade during the transfer processes.
Others have developed techniques for the three-dimensional patterning of masks, and these holographic patterning techniques hold promise for advancement of photonic structures. See, M. Campbell et al, “Fabrication of photonic crystals for the visible spectrum by holographic lithography,” Nature, 404, 53-56 (2000); S. Shoji and S. Kawata, “Photofabrication of three-dimensional photonic crystals by multibeam laser interference into a photopolymerizable resin,” App. Phy. Lett., 76, 2668-2670 (2000); and P. Visconti et al, “Nanopatterning of organic and inorganic materials by holographic lithography and plasma etching,” Microelectron. Eng., 53, 391-394 (2000). The holographic techniques produce photonic structure patterns in dielectric materials. However, transferring the patterns into photonic device materials, e.g., semiconductor quality Group III-V materials such as GaAs, is problematic. For example, the Campbell et al process described in the Nature article transferred patterns from a resist by producing an inverse replica in titania. As described above, mask transfer techniques for the resist are problematic. In addition, practical devices require locally controlled variations or defects in the photonic crystal lattice. Thus, there remains a need for an improved method to form surface relief patterns in solid state materials.